An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, , 62, 1335-1344 (2015)
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer, IEEE Transactions on Biomedical Circuits and Systems, , 9, 138-151 (2015)
EMI Issues in Pseudo-Differential Signaling for SDRAM Interface, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 455-462 (2015)
An Adaptive-Bandwidth Referenceless CDR with Small-area Coarse and Fine Frequency Detectors, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 404-416 (2015)
An In-Band Noise Filtering 32-tap FIR-Embedded Delta Sigma Digital Fractional-N PLL, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 342-348 (2015)
An OTA with Positive Feedback Bias Control for Power Adaptation Proportional to Analog Workloads, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 326-333 (2015)
Cost-Efficient and Automatic Large Volume Data Acquisition Method for On-Chip Random Process Variation Measurement, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 184-193 (2015)
An Adaptive Equalizer for High-Speed Receiver using a CDR-Assisted All-Digital Jitter Measurement, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 15, 155-167 (2015)
Analytical Formulas for Tradeoff Among Channel Loss, Length, and Frequency of RC- and LC-Dominant Single-Ended Interconnects for Fast Equalized Link Tradeoff Estimation, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, , 5, 1497-1506 (2015)
An LCD-VCOM-Noise Resilient Mutual-Capacitive Touch-Sensor IC Chip With a Low-Voltage Driving Signal, IEEE SENSORS JOURNAL, , 15, 4595-4602 (2015)
The Oscillation Frequency of CML-based Multipath Ring Oscillators, Journal of Semiconductor Technology and Science, , 15, 671-677 (2015)
A Single-Stage 37 dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Medical Imaging, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 14, 579-587 (2014)
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 987-991 (2014)
A 0.5-V, 1.47-mu W 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 840-844 (2014)
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 49, 2618-2630 (2014)
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, , 61, 3034-3043 (2014)
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 61, 481-485 (2014)
Current-Mode Transceiver for Silicon Interposer Channel, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 49
2044-2053 (2014)
Verilog Modeling of Transmission Line for USB 2.0 High-Speed PHY Interface, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, , 14, 463-470 (2014)
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, , 8, 799-809 (2014)
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier, IEEE Trans. on Circuits and Systems-II, , 60, 142-146 (2013)
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, , 60, 91-95 (2013)
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation, IEEE Journal of Solid-State Circuits, , 48, 2118-2127 (2013)
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL, IEEE Journal of Solid-State Circuits, , 48, 2795-2804 (2013)
A Channel Model of Scaled RC-dominant Wires for High-Speed Wireline Transceiver Design, Journal of Semiconductor Technology and SCience, , 13, 482-491 (2013)
A 1.9-GHz Fractional-N Digital PLL With Subexponent Delta Sigma TDC and IIR-Based Noise Cancellation, IEEE Transaction on circuits and Systems II, , 59, 721-725 (2012)
An Energy-efficient Equalized Transceiver for RC-dominant Channels, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 45, 1186-1197 (2010)
A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS, IEEE JOURNAL OF SOLID-STATE CIRCUITS, , 44, 3526-3538 (2009)
Characterization of Equalized and Repeated Interconnects for NoC Applications, IEEE DESIGN & TEST OF COMPUTERS, , 25, 430-439 (2008)